ATIME 2013-1, 17/04/2013

OVERVIEW OF SIGMA-DELTA MODULATORS: FUNDAMENTALS, STATE-OF-THE-ART SURVEY AND PRACTICAL DESIGN GUIDE

José M. de la Rosa

COURSE DESCRIPTION
Sigma-Delta Modulators (SDMs) are one of the best choices for the implementation of analog/digital interfaces integrated in CMOS technologies. Compared to other kinds of Analog-to-Digital Converters (ADCs), SDMs cover the widest conversion region of the resolution-versus-bandwidth plane, being the most efficient solution to digitize very diverse types of signals in an increasing number of application scenarios, which span from high-resolution low-bandwidth data conversion like digital audio, sensor interfaces, and instrumentation to ultra-low power biomedical systems and medium-resolution broadband wireless communications. This versatility, together with their robustness with respect to analog circuit imperfections, has motivated that more and more engineers today consider SDMs as a first choice to develop embedded ADCs in Systems-on-Chip (SoC) solutions.

In spite of the mentioned advantages, the design of CMOS SD ADCs involves a number of practical issues and trade-offs that must be taken into account in order to optimize their performance in terms of power consumption, silicon area and time-to-market deployment. This has motivated that, fuelled by technology downscaling and industry trends in consumer electronics, significant efforts have been made over the last years to decrease the power budget of SDMs and to increase their range of applications. As a result, a number of new architectures, circuit and system design techniques have been developed, which have pushed the state of the art on SDMs forward, yielding to innovative results and successful industry products.

In this scenario, this course presents a systematic and comprehensive description of the universe of SDMs, their diverse types of architectures, circuit techniques, analysis and synthesis methods and CAD tools, as well as their practical design considerations − going from system-level specifications to silicon integration, prototyping, and measurements. A number of case studies and examples are given to illustrate the design considerations explained in the course, covering the whole design flow of SD ADCs. A review of the state of the art on nanometer CMOS implementations is also presented in the course, giving a survey of cutting-edge SDM architectures and circuit techniques. The statistical data extracted from more than 300 cutting-edge Integrated Circuits (ICs) is exhaustively analysed to identify trends, design challenges, as well as the most efficient solutions proposed for different applications in the frontiers of SDMs.

CONTENTS OF THE COURSE

The course is divided in two blocks of 3.5 hours each one. The first course block begins with an introductory survey of SDMs, their principles of operation, fundamental architectures, analysis and synthesis methods as well as a taxonomical description of their practical topologies, circuit techniques and main nonideal effects degrading their performance. Mathematical models, analytical procedures and design guidelines are given in this part of the course to provide sufficient understanding of the main practical problems affecting the performance of SDM in practice. This first part of the course is concluded with an overview of the state-of-the-art SDMs, comparing their performance with Nyquist-rate ADCs, and identifying the incoming trends, design challenges and practical solutions proposed by cutting-edge IC designers.

The knowledge derived from the first part of the course is presented in this course as an essential part of the systematic top-down/bottom-up design methodology described in the second course block. This lecture analyzes different strategies for the high-level modeling and simulation of SDMs, putting especial emphasis on the behavioral modeling in MATLAB/SIMULINK environment. The second part of this lecture moves down from system-level to the circuit and physical level, providing design recommendations and practical recipes to complete the design flow of SDMs. A number of examples, case studies, and simulation test benches are given to illustrate the practical issues and design considerations addressed in the course, which cover from macromodeling, to electrical analysis and simulation using Cadence Design FrameWork II, to layout design considerations, chip prototyping, and experimental measurements of SDMs in the laboratory.

The main topics covered in the course are the following:

COURSE BLOCK I (Morning Lectures):

OVERVIEW OF SIGMA-DELTA MODULATORS: BASIC CONCEPTS, ARCHITECTURES, CIRCUITS AND STATE-OF-THE-ART SURVEY

• Introduction and fundamentals
• Taxonomy of SD Modulators
• Discrete-Time versus Continuous-Time implementations
• Non-ideal performance: circuits and error mechanisms
• Frontiers of SDMs: cutting-edge architectures and techniques
• Statistical Analysis of State-of-the-Art SD Modulators

COURSE BLOCK II (Afternoon Lectures):

PRACTICAL DESIGN GUIDE OF SIGMA-DELTA MODULATORS

• Synthesis methodology and architecture selection
• System partitioning and sizing process
• Simulation approaches: behavioral modeling of SDMs
• SIMSIDES: A SIMulink-based SIgma-DElta Simulator
• Macromodeling SDMs and transistor-level implementation
• Circuit-level design considerations and electrical characterization
• Layout design, prototyping and test
• Case studies and design examples

COURSE MATERIAL

A completed set of the course material will be given in advance to the audience, including slides and an exhaustive list of references classified according to the topics given in the course. These references will be commented and some recommendations will be given at the end of the course in order to guide the audience to continue exploring and increasing its knowledge about SDMs.

LEARNING OBJECTIVES

The main objective of the course is to give a comprehensive overview of SD converters, their state-of-the art performance, applications, challenges and practical design considerations. All these ingredients are put together with a huge list of bibliographic references, design recipes and practical advises that will allow the audience to learn many practical things about the current trends in the design of SDMs.

This general objective can be divided into the following specific objectives:
• To give an overview of SD converters, covering from basic concepts and architectures to the state of the art and their applications.
• To present a practical systematic design methodology of SD converters, including circuit limitations, modeling techniques, simulation test benches, physical implementation and experimental characterization
• To describe practical case studies and examples, with emphasis on nanometer CMOS implementations, in order to put theory into practice in a comprehensive way.

TARGET AUDIENCE AND PREREQUISITE KNOWLEDGE

The course is intended for a large audience: from senior researchers and mixed-signal designers who want to get knowledge about the systematic design of state-of-the-art SD converters, to non-experienced graduate students who are looking for a comprehensive description of SD modulators, their problems and their practical solutions. Therefore, no prerequisites are needed. The contents are organized and addressed for the general audience.

INSTRUCTOR’S BIO

José M. de la Rosa, IEEE Senior Member, received the M.S. degree in Physics in 1993 and the Ph.D. degree in Microelectronics in 2000, both from the University of Seville, Spain. Since 1993 he has been working at the Institute of Microelectronics of Seville (IMSE), which is in turn part of the Spanish Microelectronics Center (CNM) of the Spanish National Research Council (CSIC). He is also with the Department of Electronics and Electromagnetism of the University of Seville, where he is currently an Associate Professor.
His main research interests are in the field of analog and mixed-signal integrated circuits, especially high-performance data converters, including analysis, behavioral modeling, design and design automation of such circuits. In these topics, Dr. de la Rosa has participated in a number of National and European research and industrial projects, and has co-authored more than 170 international peer-reviewed publications, including journal and conference papers, book chapters and the books Systematic Design of CMOS Switched-Current Bandpass Sigma-Delta Modulators for Digital Communication Chips (Kluwer, 2002), CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom: Error Analysis and Practical Design (Springer, 2006), Nanometer CMOS Sigma-Delta Modulators for Software Defined Radio (Springer, 2011) and CMOS Sigma-Delta Converters: Practical Design Guide (Wiley-IEEE Press, 2013).

Dr. de la Rosa is a member of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems Society. He serves as Associate Editor for IEEE Transactions on Circuits and Systems I: Regular Papers. He has also served and is currently serving as a review committee member of IEEE ISCAS conference. He participated and is currently participating in the organizing and technical committees of diverse international conferences, among others IEEE MWSCAS, IEEE ICECS, IEEE LASCAS, IFIP/IEEE VLSI-SoC and DATE. He served as TPC co-chair of IEEE MWSCAS 2012 and IEEE ICECS 2012. He is also a member of the Steering Committee of IEEE MWSCAS.

Full Registration: Includes refreshments, lunch and course notes - €200
Morning Registration: Includes refreshments and course notes. Lunch is not included -€150
Afternoon Registration: Includes refreshments and course notes. Lunch is not included - €150
Student Registration: Includes refreshments, lunch and course notes. A valid student card must be presented on the day - €100

Contact:
Prof. Michael Peter Kennedy, Dept. of Electrical and Electronic Engineering, UCC
Tel: +353 21 4903124 Email: